EPCS4SI8N

Product Summary

The EPCS4SI8N is a serial configuration device. With SRAM-based devices, the EPCS4SI8N supports active serial configuration, configuration data must be reloaded each time the device powers up, the system reconfigures, or when new configuration data is required. Serial configuration devices are flash memory devices with a serial interface, the EPCS4SI8N can store configuration data for FPGA devices that support active serial configuration and reload the data to the device upon power-up or reconfiguration.

Parametrics

EPCS4SI8N absolute maximum ratings: (1)VCC Supply voltage for EPCS1, EPCS4, and EPCS16 With respect to ground: -0.6 to 4.0V; (2)Supply voltage for EPCS64 and EPCS128 With respect to ground: -0.2 to 4.0V; (3)VI DC input voltage for EPCS1, EPCS4, and EPCS16 With respect to ground: -0.6 to 4.0V; (4)DC input voltage for EPCS64 and EPCS128 With respect to ground: -0.5 to 4.0 V; (5)IMAX DC VCC or GND current: 15mA; (6)IOUT DC output current per pin: -25 to 25mA; (7)PD Power dissipation: 54mW; (8)TSTG Storage temperature No bias: -65 to 150℃; (9)TAMB Ambient temperature Under bias: -65 to 135℃; (10)TJ Junction temperature Under bias: 135℃.

Features

EPCS4SI8N features: (1)1-, 4-, 16-, 64-, and 128-Mbit flash memory devices that serially configure Arria series, Cyclone series, all device families in the Stratix series except the Stratix device family, and FPGAs using the active serial (AS) configuration scheme; (2)Easy-to-use four-pin interface; (3)Low cost, low-pin count, and non-volatile memory; (4)Low current during configuration and near-zero standby mode current ; (5)2.7-V to 3.6-V operation; (6)EPCS1 and EPCS4 available in 8-pin small outline integrated circuit (SOIC) package. EPCS16 available in 8-pin or 16-pin SOIC packages. EPCS64 and EPCS128 available in 16-pin SOIC package; (7)Enables the Nios processor to access unused flash memory through AS memory interface; (8)Re-programmable memory with more than 100,000 erase/program cycles; (9)Write protection support for memory sectors using status register bits; (10)In-system programming support with SRunner software driver; (11)In-system programming support with USB Blaster,EthernetBlaster, or ByteBlaster II download cables; (12)Additional programming support with the Altera Programming Unit (APU) and programming hardware from BP Microsystems, System General, and other vendors; (13)Delivered with the memory array erased (all the bits set to 1) 1 The term “serial configuration devices” used in this document ref.

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